1. Field of the Invention
This invention relates to a method, system, apparatus, and program for characterizing phase-locked loop (PLL) behavior, and more particularly to an improved method, system, apparatus, and program for measuring the damping factor of Nth-order PLLs.
2. Related Art
A phase-locked loop (PLL) is an electrical circuit which can find use in a number of different fields. For example, PLLs are used in radio, telecommunications, space communications, computers, and other electronic applications in which it is desired to stabilize a generated signal or to detect signals in the presence of noise. As a particular example, PLLs are often employed in frequency-synthesized radio transmitters and receivers. A PLL can also act as a detector in a frequency-modulation (FM) or phase-modulation (PM) receiver. Thus, a PLL can be understood to be a closed-loop feedback control system that maintains a generated signal in a fixed phase relationship relative to a reference signal.
Typically, a PLL is designed using circuit modeling techniques that assume ideal component performance. Like all hardware design, the circuits are then validated in the lab on prototype modules for conformance to expected behavior. The damping factor (ζ) of a PLL can be an important characteristic in defining the dynamic performance of the PLL. As such it is necessary to measure the damping factor ζ of a PLL.
An example of a fairly well known approach to measuring the damping factor ζ of a PLL is provided in the publication entitled Phase-Locked Loops: Design, Simulation, and Applications, Fifth Edition, by Roland E. Best. Section 11.5 of this text describes an example of how to make the damping factor measurement using commonly available test equipment.
However, one drawback to this method, as stated in the publication, is that it is only suitable for measuring PLLs in which the damping factor ζ is expected to be less than 1.0. The reason for this is that this approach relies on being able to measure the output's time-domain response to a phase-step transient injected at the PLL's input. Specifically, this requires being able to measure the amplitude of successive peak overshoot and undershoot portions of the signal wave, and then, in turn, using a mathematical relationship of the ratio of these measurements to calculate the damping factor. In the case of PLLs with a damping factor ζ equal to or greater than 1.0, it is not possible to use this method because there is no undershoot portion of the signal wave. Since many of the PLLs used in telecommunications products have a damping factor ζ higher than 1.0, this approach is unsuitable for taking this measurement. An improved approach is therefore needed.
A second drawback to the approach described above is that it requires a different test setup than that used to determine the −3 dB cutoff frequency of the PLL. Generally, when characterizing a PLL in the lab, a user will want to measure, at a minimum, both the −3 dB cutoff frequency and the damping factor ζ of the loop, as these are two of the most important characteristics that specify a PLL's dynamic behavior. All other PLL parameters can be derived from them. Using two different test setups to attain these measurements can add time and complexity to the procedure. A unified test configuration would be preferred.
There exists, therefore, a need to provide a novel method for measuring the damping factor ζ of a 2nd-order PLL that overcomes the above-noted and other drawbacks of the existing methods.